Figure 2: NVIDIA Jetson TX2 Tegra “Parker” SoC block diagram featuring integrated NVIDIA Pascal GPU, NVIDIA Denver 2 + ARM Cortex-A57 CPU clusters, and multimedia acceleration engines.

About Mark Harris
Mark is an NVIDIA Distinguished Engineer working on RAPIDS. Mark has over twenty years of experience developing software for GPUs, ranging from graphics and games, to physically-based simulation, to parallel algorithms and high-performance computing. While a Ph.D. student at The University of North Carolina he recognized a nascent trend and coined a name for it: GPGPU (General-Purpose computing on Graphics Processing Units).
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